As a follow on to my earlier blog in November I wanted to discuss the methods I find successful in dealing with Reliability Testing of sample sizes which are simply not statistically significant. Yet there is an absolute need to have high confidence in device or product reliability
The only way round this is to truly test all contributors to possible defect by applying a range of SEQUENTIAL stress tests to ensure the Cumulative Stress Applied is of such a level it exceeds the failure threshold or strength level of the device or product which may have been weakened during manufacture and contains LATENT defect(s)
Both PATENT and LATENT defects are introduced into the product during fabrication, assembly, handling and test operations, the Patent defects pass through various assembly stages until they are detected by a test or inspection of sufficient thoroughness and are subsequently eliminated from the
product. A smaller percentage of defects however, cannot be detected by conventional mean, such defects are termed Latent defects.
Latent defects are characterized as an inherent or induced weakness or flaw in material which will manifest as an early or premature failure in the operational environment, most commonly known as an Early Life Defect, Most companies state they suffer mostly from Pre-Mature defects , or Early Life.
So How do we develop the appropriate and most effective Reliability Test strategy/approach ?
The majority of parts and connections within an electronic device or product are “good’ and will never fail over the product’s lifetime. The failures which occur during product life are traceable to design or externally induced causes, or to latent defects which may have been introduced into the product during manufacture. Not all latent defects however, are screenable with factory testing / burn-in, etc, only those latent defects, whose failure threshold can be accelerated by the stresses imposed by the production screens. Such screenable defects, if not removed from the product will result in premature or early- life failures in the field. Hence it is the Early Life Failure which the accelerated stress test
programme must be designed to detect and subsequently remove.
If we consider semiconductor devices, there is a wide range of potential packaged issues that can occur, hence extremely difficult for an engineer to pick individual stress tests to cover such a wide range as a specific type of stress test such as THB or HAST may not accelerate or stimulate some of the latent defects.
The JEDEC type tests are individually VERY EFFECTIVE, but when individual stress tests are applied to different batches, the overall Test Strength Coverage is TOO LOW, hence we need to dig much deeper. An effective way of doing this is to list the range of potential defects in a matrix and assess the ability of the JEDEC type tests or any other type of accelerated stress test to stimulate the possible latent defects , an example is shown below where we map the defects types against accelerated stress test type to define widest coverage of tests required.
The key to this is to then select the tests which provide most coverage and apply them SEQUENTIALLY as shown in table below.
Once the highest benefit stress tests are identified, the sequential order can be discussed to define if there might be an ‘optimum’ sequence to maximise defect stimulation.
As can be seen, the standard JEDEC style tests are applied, but made much more meaningful and stronger when combined in manner shown.
This may mean of course that standard tests done individually are not done in parallel, hence time to complete the sequential ELP (Early Life Performance) test will be longer.
However the sample size of devices or products will be less and time to get started may be earlier to gain benefit.
In my experience running tests like this, the effects have been extremely positive and clients have developed internal sequential test approaches IN ADDITION to individual JEDEC Qualification tests to ensure they maximise ability to guarantee high reliability prior to volume production from low volume samples which can generate significantly more latent defects.
How do I achieve the Total Solution?
Reliability Solutions and RelTech UK (one of the best known Reliability test Labs in Europe) collaborate closely to provide the total design solution to customers for setting up the most effective Reliability test processes using advanced bespoke test fixturing and in-situ test solutions to provide critical output on failure patterns, failure reasons, etc.
We also now provide UK based reliability improvement seminars near the RelTech site allowing engineers and management to learn how to do things the ‘Smart’ way and see the ‘real’ solutions in place at the Reltech test lab at Dursley in Gloucestershire.
Would you like to learn more?
If so contact me at email@example.com
MD Reliability Solutions
+44 7967 144097